set_global_assignment in quartus

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Specify include path in Quartus II

I'm compiling Verilog using the Quartus II for the Altera platform. In my Verilog, I have a Verilog header global.vh , and Quartus II cannot find it:

Is there a way to specify an "include path" for Verilog header files in Quartus II?

(Note that the header file can be found when placed in the root directory for the Quartus II project.)

Altera recommends that you use the SEARCH_PATH assignment to define the project libraries. You can have multiple SEARCH_PATH assignments. However, you can specify only one source directory for each SEARCH_PATH assignment.

For example:

Please refer to Managing Quartus II Projects document for more details.

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Find a training course, create a simple tcl script for altera quartus ii, tcl implementation in quartus.

Altera Quartus II has a thorough implementation, with many extra Tcl commands added for Quartus. To allow easy access, they are organised into Tcl packages which may be imported when needed.

Altera Quartus II provides a Tcl prompt, so you can directly type in commands, or   source   (read in) Tcl commands from an external file.

Using Tcl to set pin locations

Let's look at using Tcl to set pin locations, using the Tcl command window in the Graphical User Interface (GUI).

You'll need a Tcl file with commands to set pin locations. Here is an example from the Doulos Comprehensive VHDL course:

Let's assume you've already run Quartus, and synthesised your design. The next step is to set the pin constraints before place and route. To use the above Tcl file, you would need to follow these instructions:

• If you can't see the Tcl Console, open it using menu View > Utility Windows > Tcl Console
• In the Tcl Console, type the command source tornado.tcl

That's it! Now you can complete the compile for your design.

Well, that's almost it - the command will only work if the pin file is in your Quartus project folder. If it's in a different folder you will have to specify the path. The path can be a full path such as   "c:/users/training/vhdlfpga/exo2/source/board_support/tornado.tcl"   or it could be a relative path such as   "../source/board_support/tornado.tcl"   - Note that Tcl   always uses the forward slash   in paths, whether on Windows or Unix/Linux. Note also that you will need to surround the path in double quotes if it contains spaces.

Make your own script!

If you are new to Tcl, Quartus has a powerful feature which can get you started by creating a file of settings for you. It's then an easy job to turn that file into a simple script.

Firstly, now you've run your project using the GUI, you can store the settings using the menu:

Project > Generate Tcl File for Project...

A dialogue box will pop up allowing you to store the Tcl file. Here's what happened when we ran that command on Comprehensive VHDL exercise 2:

So far so good... but this is only the project settings: how do we turn it into a compile script? It is actually surprisingly easy. Firstly, we must modify the end of the file as follows:

This uses the Quartus   execute_flow   command to carry out the compile. However if you try and run this script, it won't work as it cannot find that command. We need to import an additional package at the top of the script, i.e.

Et voilà a Quartus script!

To run it, you can put it in the project directory and use the   source   command as above from the GUI. Or you can run it from the command line as follows:

• Open a terminal (Linux) or a cmd prompt (Windows)
• Change into the folder where the Tcl file is located
• Type the command: quartus_sh -t exo2proj.tcl

You'll find scripts like this used in our training course   Comprehensive VHDL .  

Henry Hastings

Lockheed martin.

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Compiling *.vhdl into a library, using Altera Quartus II

I am trying to use 'Floating point and Fixed point package' as a part of my filter design in VHDL. I am using Altera Quartus II as the development environment. I downloaded the file package from the website: http://www.vhdl.org/fphdl/ , now available at http://web.archive.org/web/20160305202256/http://www.vhdl.org/fphdl/

In their user guide, below is mentioned:

However, I do not exactly know how I can compile the mentioned *.vhdl files into a library using Altera Quartus II tool.

Any tip would be appreciated.

• floating-point
• fixed-point

• 1 The lines I included above are directly from their user guide, so yes. –  ElectroJunkie Commented Oct 25, 2013 at 2:45
• Ah, yes, but it does not compile as a regular project, because it doesn't have regular VHDL syntax, such as 'missing entity' and etc... –  ElectroJunkie Commented Oct 25, 2013 at 3:00
• It is a good idea, but how can I include those files without using "use <library_name>.all;" something like that? I don't know how... ;( –  ElectroJunkie Commented Oct 25, 2013 at 3:54
• um. It didn't work out either ... Or I should ask 'how can I add those files to current working library?' –  ElectroJunkie Commented Oct 25, 2013 at 4:29
• Oh, adding a line 'library work;' before the 'use work.<package>.all' allowed me to compile them without error. Now, I need to test, if I can actually use the library functions. Thank you! :) –  ElectroJunkie Commented Oct 25, 2013 at 5:43

2 Answers 2

Using Altera Quartus II GUI you can add the 'fixed_float_types_c.vhdl', 'fixed_pkg_c.vhdl' and 'float_pkg_c.vhdl' files to the project through the "Project Navigator" tab called "Files". See figure below.

When you add the files you can specify the target library under "Properties". See figure below.

You can also modify the Quartus II settings (".qsf") file for the project, and add the lines:

However, you may want to determine if compiling into the "ieee_proposed" library is required, and otherwise you can just compile them into the "work" library with other files.

Just compile them into work as you would any other files in your project and refer to them by use work._library_name_ .

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代码先锋网  代码片段及技术文章聚合

不同版本的quatus ii打开工程遇到的问题info (125063): set_global_assignment -name use_qhd off.

技术标签：  FPGA学习之路    fpga开发

今天用quatusII 17.1打开13.1编写的工程代码出现了这样的问题

上百度查询，查到了类似的问题与解决方法，是这样的：

我用Quartus II打不开工程。软件提示错误：Error: Error reading Quartus II Settings File D:/Documents and Settings/Administrator/My Documents/Verilog HDL/Experiment01/top_module.qsf, line 70 Info: set_global_assignment -name MISC_FILE “D:/Documents and Settings/Administrator/My Documents/Verilog HDL/Experiment01/top_module.dpf” 我是个初学者，请各位高手回答时详细点。谢谢。

原文链【 https://zhidao.baidu.com/question/337283551.html 】

···························

解决方法： 你的设计顶层是/top_module.dpf，这个文件有问题，你在/top_module.qsf中的第70行把set_global_assignment -name MISC_FILE "D:/Documents and Settings/Administrator/My Documents/Verilog HDL/Experiment01/top_module.dpf删除掉，这句话是指定顶层的语法。删除后打开工程，然后再set顶层文件就可以了。如果还是报其他的错误，方法同理，qsf文件时整个工程的设置文件，你可以把这个文件清空，然后打开工程后再一步一步的设置工程，包括IO分配，约束等等，以及编译布局布线的设置。。。

按照他的方法我没找到代码中的文件路径，本来想重新建一个工程再配置一下，但是还是想偷懒不想重新建，然后就直接把这句636行代码屏蔽掉重新打开工程就可以了

这样做不知道会不会影响后期的使用，但是我重新编译了一下是没有报错的，索性就将就着用吧，出现问题再回来补充。

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